november 2013 fdp20n50 / fdpf20n50 / fdpf 20n50t ? n-channel unifet tm mosfet ?2006 fairchild semiconductor corporation fdp20n50 / fdpf20n50 / FDPF20N50T rev. c1 www.fairchildsemi.com 1 absolute maximum ratings t c = 25c unless otherwise noted. thermal characteristics symbol parameter fdp20n50 fdpf20n50 / FDPF20N50T unit v dss drain-source voltage 500 v i d drain current - continuous (t c = 25 c) - continuous (t c = 100 c) 20 12.9 20 * 12.9 * a a i dm drain current - pulsed (note 1) 80 80 *a v gss gate-source voltage 30 v e as single pulsed avalanche energy (note 2) 1110 mj i ar avalanche current (note 1) 20 a e ar repetitive avalanche energy (note 1) 25 mj dv/dt peak diode recovery dv/dt (note 3) 4.5 v/ns p d power dissipation (t c = 25 c) - derate above 25 c 250 2.0 38.5 0.3 w w/ c t j, t stg operating and storage temperature range -55 to +150 c t l maximum lead temperature for soldering, 1/8? from case for 5 seconds 300 c symbol parameter fdp20n50 fdpf20n50/ FDPF20N50T unit r jc thermal resistance, junction-to-case, max. 0.5 3.3 c/w r ja thermal resistance, junction-to-ambient, max. 62.5 62.5 fdp20n50 / fdpf20n50 / FDPF20N50T n-channel unifet tm mosfet 500 v, 20 a, 230 m features ?r ds(on) = 200 m (typ.) @ v gs = 10 v, i d = 10 a ? low gate charge (typ. 45.6 nc) ? low c rss (typ. 27 pf) ? 100% avalanche tested applications ? lcd/led/pdp tv ? lighting ? uninterruptible power supply ? ac-dc power supply description unifet tm mosfet is fairchild semiconductor?s high voltage mosfet family based on planar stripe and dmos technology. this mosfet is tailored to reduce on-state resistance, and to provide better switching performance and higher avalanche energy strength. this device family is suitable for switching power converter applications such as power factor correction (pfc), flat panel display (fpd) tv power, atx and electronic lamp ballasts. to-220 g d s to-220f g d s g s d * drain current limited by maximum junction temperature.
fdp20n50 / fdpf20n50 / fdpf 20n50t ? n-channel unifet tm mosfet ?2006 fairchild semiconductor corporation fdp20n50 / fdpf20n50 / FDPF20N50T rev. c1 www.fairchildsemi.com 2 package marking and ordering information electrical characteristics t c = 25c unless otherwise noted. notes: 1. repetitive rating: pulse-width li mited by maximum junction temperature. 2. l = 5.0 mh, i as = 20 a, v dd = 50 v, r g = 25 , starting t j = 25 c. 3. i sd 20 a, di/dt 200 a/ s, v dd bv dss , starting t j = 25 c. 4. essentially independent of operating temperature typical characteristics. part number top mark package packing method reel size tape width quantity fdp20n50 fdp20n50 to-220 tube n/a n/a 50 units fdpf20n50 fdpf20n50 to-220f tube n/a n/a 50 units FDPF20N50T fdpf20n50 to-220f tube n/a n/a 50 units symbol parameter conditions min. typ. max. unit off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a 500 -- -- v bv dss / t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c--0.5--v/ c i dss zero gate voltage drain current v ds = 500 v, v gs = 0 v v ds = 400 v, t c = 125 c -- -- -- -- 1 10 a a i gssf gate-body leakage current, forward v gs = 30 v, v ds = 0 v -- -- 100 na i gssr gate-body leakage current, reverse v gs = -30 v, v ds = 0 v -- -- -100 na on characteristics v gs(th) gate threshold voltage v ds = v gs , i d = 250 a3.0--5.0v r ds(on) static drain-source on-resistance v gs = 10 v, i d = 10 a -- 0.20 0.23 g fs forward transconductance v ds = 40 v, i d = 10 a -- 24.6 -- s dynamic characteristics c iss input capacitance v ds = 25 v, v gs = 0 v, f = 1.0 mhz -- 2400 3120 pf c oss output capacitance -- 355 465 pf c rss reverse transfer capacitance -- 27 -- pf switching characteristics t d(on) turn-on delay time v dd = 250 v, i d = 20 a, v gs = 10 v, r g = 25 (note 4) -- 95 200 ns t r turn-on rise time -- 375 760 ns t d(off) turn-off delay time -- 100 210 ns t f turn-off fall time -- 105 220 ns q g total gate charge v ds = 400 v, i d = 20 a, v gs = 10 v (note 4) -- 45.6 59.5 nc q gs gate-source charge -- 14.8 -- nc q gd gate-drain charge -- 21.6 -- nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -- -- 20 a i sm maximum pulsed drain-source diode forward current -- -- 80 a v sd drain-source diode forward voltage v gs = 0 v, i s = 20 a -- -- 1.4 v t rr reverse recovery time v gs = 0 v, i s = 20 a, di f /dt =100 a/ s -- 507 -- ns q rr reverse recovery charge -- 7.20 -- c
fdp20n50 / fdpf20n50 / fdpf 20n50t ? n-channel unifet tm mosfet ?2006 fairchild semiconductor corporation fdp20n50 / fdpf20n50 / FDPF20N50T rev. c1 www.fairchildsemi.com 3 typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate voltage variation vs. source current and temperatue figure 5. capacitance characteristics figure 6. gate charge characteristics 24681012 10 0 10 1 10 2 150 o c 25 o c -55 o c * notes : 1. v ds = 40v 2. 250 s pulse test i d , drain current [a] v gs , gate-source voltage [v] 10 -1 10 0 10 1 10 0 10 1 v gs top : 15.0 v 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v bottom : 5.5 v * notes : 1. 250 s pulse test 2. t c = 25 o c i d , drain current [a] v ds , drain-source voltage [v] 0.20.40.60.81.01.21.41.6 10 0 10 1 150 o c *notes : 1. v gs = 0v 2. 250 s pulse test 25 o c i dr , reverse drain current [a] v sd , source-drain voltage [v] 0 153045607590 0.0 0.2 0.4 0.6 0.8 v gs = 20v v gs = 10v * note : t j = 25 o c r ds(on) [ ], drain-source on-resistance i d , drain current [a] 0 1020304050 0 2 4 6 8 10 12 v ds = 250v v ds = 100v v ds = 400v * note : i d = 20a v gs , gate-source voltage [v] q g , total gate charge [nc] 10 -1 10 0 10 1 0 1000 2000 3000 4000 5000 6000 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd * note : 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitances [pf] v ds , drain-source voltage [v]
fdp20n50 / fdpf20n50 / fdpf 20n50t ? n-channel unifet tm mosfet ?2006 fairchild semiconductor corporation fdp20n50 / fdpf20n50 / FDPF20N50T rev. c1 www.fairchildsemi.com 4 typical performance characteristics (continued) figure 7. breakdown voltage variatio n figure 8. on-resistance variation vs. temperature vs. temperature figure 9-1. maximum safe operating area figure 9-2. maximum safe operating area - fdp20n50 - fdpf20n50 figure 10. maximum drain current vs. case temperature -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 * notes : 1. v gs = 0 v 2. i d = 250 a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 * notes : 1. v gs = 10 v 2. i d = 10 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] 10 0 10 1 10 2 10 -2 10 -1 10 0 10 1 10 2 100 ms 1 ms 10 s dc 10 ms 100 s operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] 10 0 10 1 10 2 10 -2 10 -1 10 0 10 1 10 2 100 ms 1 ms 10 s dc 10 ms 100 s operation in this area is limited by r ds(on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] 25 50 75 100 125 150 0 5 10 15 20 25 i d , drain current [a] t c , case temperature [ o c]
fdp20n50 / fdpf20n50 / fdpf 20n50t ? n-channel unifet tm mosfet ?2006 fairchild semiconductor corporation fdp20n50 / fdpf20n50 / FDPF20N50T rev. c1 www.fairchildsemi.com 5 typical performance characteristics (continued) figure 11-1. tr ansient thermal response curve - fdp20n50 figure 11-2. tran sient thermal response curve - fdpf20n50 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 * n otes : 1 . z jc (t) = 0.5 o c/w max. 2 . d u ty f a cto r, d = t 1 /t 2 3 . t jm - t c = p dm * z jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), thermal response t 1 , square w ave pulse duration [sec] t 1 p dm t 2 z jc (t), thermal response [ o c/w] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 * n otes : 1 . z jc (t) = 3.3 o c/w max. 2 . d u ty f a cto r, d = t 1 /t 2 3 . t jm - t c = p dm * z jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), thermal response t 1 , square w ave pulse duration [sec] t 1 p dm t 2 z jc (t), thermal response [ o c/w]
fdp20n50 / fdpf20n50 / fdpf 20n50t ? n-channel unifet tm mosfet ?2006 fairchild semiconductor corporation fdp20n50 / fdpf20n50 / FDPF20N50T rev. c1 www.fairchildsemi.com 6 figure 12. gate charge test circuit & waveform figure 13. resistive switch ing test circuit & waveforms figure 14. unclamped inductive switching test circuit & waveforms v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs charge v gs 10v q g q gs q gd 3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut charge v gs 10v q g q gs q gd 3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut e as =li as 2 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time 10v dut r g l i d t p e as =li as 2 ---- 2 1 e as =li as 2 ---- 2 1 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time 10v dut r g l l i d i d t p v gs v gs i g = const.
fdp20n50 / fdpf20n50 / fdpf 20n50t ? n-channel unifet tm mosfet ?2006 fairchild semiconductor corporation fdp20n50 / fdpf20n50 / FDPF20N50T rev. c1 www.fairchildsemi.com 7 figure 15. peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
fdp20n50 / fdpf20n50 / fdpf 20n50t ? n-channel unifet tm mosfet ?2006 fairchild semiconductor corporation fdp20n50 / fdpf20n50 / FDPF20N50T rev. c1 www.fairchildsemi.com 8 mechanical dimensions figure 16. to220, molded, 3-lead, jedec variation ab package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packag ing area for the most recent package drawings: http://www.fairchildsemi.com/package/packagedetails.html?id=pn_to220-003
fdp20n50 / fdpf20n50 / fdpf 20n50t ? n-channel unifet tm mosfet ?2006 fairchild semiconductor corporation fdp20n50 / fdpf20n50 / FDPF20N50T rev. c1 www.fairchildsemi.com 9 mechanical dimensions figure 17. to220, molded, 3-lead, full pack, eiaj sc91, straight lead package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packag ing area for the most recent package drawings: http://www.fairchildsemi.com/package/packagedetails.html?id=pn_tf220-003
fdp20n50 / fdpf20n50 / fdpf 20n50t ? n-channel unifet tm mosfet ?2006 fairchild semiconductor corporation fdp20n50 / fdpf20n50 / FDPF20N50T rev. c1 www.fairchildsemi.com 10 trademarks the following includes registered and unregistered trademarks an d service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or desi gn. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditio ns, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support de vices or systems without the express written approval of fai rchild semiconductor corporation. as used here in: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms accupower? 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